Electronic Design Process Symposium

Archive for 2009

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Talks with Archived Presentations

Threads are Dead! Long Live Threads!

Chris Malachowsky
Nvidia
slides (in PDF)

Threads are Dead! Practical Realities

John Murphy
Liga Systems
slides (in PDF)

How to get 500X or more Speedup on your Parallel System While Reducing Software Development Costs

Patrick Madden
SUNY
slides (in PDF)

(Will we miss the bus?) No - And We Shouldn't! Putting It All Together the Sonics Way

Jay Jayasimha
Sonics
slides (in PDF)

Why is it Time to Get off the Bus? (At the Top Level)

Charlie Janac
Arteris
paper (in PDF)
... and also slides (in PDF)

Get off the Bus - Drive a Hybrid!

Dave Fritz
Silistix
slides (in PDF)

The EDA Graffiti System Challenges

Paul Mclellan
Greenfolder
slides (in PDF)

The Parallelism Mirage

Patrick Groeneveld
Magma
slides (in PDF)

The Disappearing Upper Mainstream

Gary Smith
Gary Smith EDA
slides (in PDF)

RTL Handoff - Why? & How?

Bernard Murphy
Atrenta
slides (in PDF)

Restrictive Design Rules and Their Impact on 22 nm Design and Physical Verification

David Abercrombie
Mentor
paper (in PDF)
... and also slides (in PDF)

Clock Concurrent Optimization - Rethinking Timing Optimization to Target Clocks and Logic at the Same Time

Marc Swinnen
Azuro
paper (in PDF)
... and also slides (in PDF)

Automated DRC Violation Waiver Management for IP Block Integration

David Abercrombie
and
John Ferguson @ Mentor
slides (in PowerPoint format (.ppt))

Waiving Known DRC Violations from Layout IP

John Ferguson
Mentor
slides (in PDF)

Analog Automation, the Ever Coming Revolution

Juan-Antonio Carballo
IBM
slides (in PDF)

Will We Miss the Bus? A Critical Refutation of SOC Design as Portrayed by the Reuse Methodology Manual: Is Everything They Wrote About System Design Now Wrong?

Steve Leibson
Tensilica
paper (in PDF)

Is the SoC Analog (EDA) Revolution Really Here?

Eric Filseth
Ciranova
slides (in PDF)

2009 EDPS Program Committee