Our Cast
Stelios Diamantidis
Cognichip
A pioneer in semiconductor innovation, Stelios Diamantidis brings over 25 years of expertise in chip design, EDA, and artificial intelligence. As a founding executive at Cognichip, he is driving the next frontier of chip design: Artificial Chip Intelligence™ ACI—powered by the world's first purpose-built, physics-informed foundation model for semiconductors.
Previously, Stelios was Distinguished Architect and Executive Director of Synopsys' Generative AI Center of Excellence, where he launched DSO.ai™—the world's first AI application for chip design—in 2020. Under his leadership, Synopsys pioneered GenAI for enterprise productivity and introduced market-defining products like Synopsys.ai™ Copilot.
A Stanford electrical engineering graduate and an IEEE member with numerous patents and publications, Stelios has founded two successful ventures and developed technologies that reshaped industry landscapes. He continues to drive strategic innovation, solving complex hardware challenges with transformative AI solutions.
Jean-Philippe Fricker
Cerebras
Jean-Philippe (J.P.) is Chief System Architect at Cerebras Systems. Before co-founding Cerebras, J.P. was Senior Hardware Architect at rack-scale flash array startup DSSD (acquired by EMC). Prior to DSSD, J.P. was Lead System Architect at SeaMicro where he designed three generations of fabric-based computer systems. Earlier in his career, J.P. was Director of Hardware Engineering at Alcatel-Lucent and Director of Hardware Engineering at Riverstone Networks. He holds an MS in Electrical Engineering from École Polytechnique Fédérale de Lausanne, Switzerland, and has authored 42 patents.
Chia-Tung Ho
Nvidia Research
Chia-Tung has several years of industrial EDA experience under his belt. Before coming to US, he worked for IDM and EDA companies in Taiwan, developing in-house design for manufacturing (DFM) flow at Macronix, and fastSPICE at Mentor Graphics and Synopsys. During his PhD study, he worked with the Design Technology Co-Optimization (DTCO) team in Synopsys as a technical intern from 2019 to 2021, also as an AI resident in X, the Google moonshot factory. In Nvidia, he works as senior research scientist on ML/AI for VLSI, Agentic AI for chip design, custom circuit design, and standard cell layout synthesis.
Xiaoning Qi
Alibaba
Xiaoning Qi is the Vice President of Alibaba Group. Previously, he held senior management and technical positions in companies such as Intel, designing integrated circuits and systems. He sits on the board of directors at several international organizations including RISC-V International Association. He is a member of Advisory Board, Global Semiconductor Alliance (GSA), and a member of CEO Council GSA. He has published more than fifty technical papers, a book, and has delivered over four dozen invited talks. He holds two US patents. Xiaoning received his Ph.D. degree in Electrical Engineering from Stanford University and is an IEEE Fellow.
Henry Sheng
Synopsys
Henry Sheng is Executive Director of R&D Engineering at Synopsys, where he leads development of EDA technologies for 3DIC, chiplet, and multi-die systems. He has played a foundational role in the creation of Synopsys' multi-die design and implementation platform, including advancements in system planning, implementation, signoff analysis integration, and AI-driven design optimization. Prior to his current role, he led physical implementation R&D and advanced-node foundry enablement from 20nm through 3nm. Henry received his B.S. and Ph.D. in Electrical Engineering and Computer Sciences from the University of California, Berkeley.
Hamid Shojaei
Cadence
Hamid Shojaei is a Distinguished Engineer at Cadence and the former CTO and Co Founder of ChipStack, which was acquired by Cadence, where he sets the technical vision and leads development of the company's LLM-powered verification platform. Hamid heads a seasoned team of engineers, turning breakthrough research into practical tools that redefine how semiconductors are designed and verified. Drawing on over 15 years' experience at Qualcomm, Google, and photonics start-up Lightmatter, he has steered teams through multiple generations of TPU and AI-centric chip projects, earning an ACM Best Paper Award along the way. Hamid holds a PhD in Computer Engineering from the University of Wisconsin, Madison, and is recognized for bridging design verification, machine learning, and cutting-edge hardware architecture.
Farhang Yazdani
BroadPak
Farhang Yazdani is a semiconductor executive, inventor, investor, author, and technology strategist with more than two decades of experience. He has played a pivotal role in advancing next-generation semiconductor packaging technologies, heterogeneous integration, chiplet architectures, silicon photonics, and co-packaged optics. Farhang is the CEO of BroadPak Corporation and inventor of the groundbreaking 3DHI HiRise Packaging Technology. He holds 40+ issued and pending patents and is the author of “Foundations of Heterogeneous Integration: An Industry-Based 2.5D/3D Pathfinding and Co-Design Approach”, a widely respected reference book on advanced semiconductor integration and system-level co-design methodologies. Farhang serves as the Co-Chair of the IMAPS Silicon Valley Chapter and contributes actively to industry roadmaps, technical committees, and professional development initiatives. He also serves on the Board of Directors and Advisory Boards of several technology companies. He is the recipient of the NIPSIA Award for his significant contributions to semiconductor packaging innovation and technology advancement. Farhang received his undergraduate and graduate degrees in Chemical Engineering and Mechanical Engineering from the University of Washington, Seattle. He collaborates with industry leaders, research institutions, and technology innovators worldwide to advance heterogeneous integration technologies and help shape the future of AI-driven computing systems.