Electronic Design Process Symposium

The 2026 IEEE Electronic Design Process Symposium (EDPS) is celebrating its 33rd year. We continue to foster free exchange of ideas among the top thinkers and thought leaders, with a focus on chips and systems designs. This year’s IEEE EDPS will be at the Semi facility in Milpitas, CA on October 1, 2026. We look forward to meeting you there.

EDPS provides a forum for this cross-section of the design community to discuss state-of-the-art improvements to electronics design processes and CAD methodologies, rather than the functions of the individual tools themselves.

As designs get more complex, the design, test and manufacturing cycles are getting longer and more intertwined with each other. Furthermore, recent advances in Agentic design flows have the potential to completely reimagine TFM with a prodigious increase in designer productivity. Hence, EDPS has been expanding its scope and looking beyond the classical design processes. EDPS will continue to cover test, manufacturing, validation, and security issues as they pertain to the design of systems and chips and has been adding focused sessions on AI-based design and chip design for AI.

EDPS will have three focused sessions covering Innovative Design Techniques, 3D Heterogeneous Integration (including Packaging and Photonics), and Agentic AI and Its Application in EDA and Design with presenters from prominent design and EDA companies, startups, and hyperscalers. These presentations are bookended by Vik Malyala's (CBO at Supermicro) opening keynote on special datacenter considerations for large-scale semiconductor design and JP Fricker's (Co-founder Cerebras) dinner keynote outlining his views on chip design can be revolutionized with AI agents.

EDPS will be held at the SEMI facility in Milpitas, CA and provide a forum for EDA, design, wafer fab and packaging/test experts to address EDA, design, and manufacturing challenges.

Committee for 2025