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Electronic Design Process Symposium
Archive for 2026
previous (2025)
Talks with Archived Presentations
Considerations for Designing Data Center for Large Scale Semiconductor Design
Vik Malyala
Supermicro
slides (in PDF)
Challenges and Opportunities for the Open-Standard RISC-V
Xiaoning Qi
Alibaba
slides (in PDF)
Deploying Agentic AI for Chip Design
Matt Maidment
Ampere
contribution (in PDF)
From Linear Pipelines to Spherical Optimization: Spec-Driven Silicon Design via Physics-Informed Foundation Models
Stelios Diamantidis
Cognichip
contribution (in PDF)
Overcoming the Scale-Out Energy Penalty: Co-Packaged Photonics Meets Glass Microfluidics
Nilesh Kamdar
Keysight
contribution (in PDF)
Advanced Substrates: The Foundation for Scale-In, Scale-Up, Scale-Out, and Optical AI Infrastructure
Farhang Yazdani
BroadPak
contribution (in PDF)
Fragmentation to Scalability: A Unified Automation and AI Stack for Multi-Die Design
Henry Sheng
Synopsys
contribution (in PDF)
Learning Agentic AI for Hardware Design Automation
Chia-Tung Ho
Nvidia Research
contribution (in PDF)
Closing the Loop: How EDA Feedback Makes AI Agents Reliable
Hamid Shojaei
Cadence
contribution (in PDF)
Applied AI Engineering for EDA
Nikhil Sharma
Amazon Web Serices
contribution (in PDF)
Security Risks of AI Agents
Naresh Sehgal
Securing the Cloud LLC.
contribution (in PDF)
Designing Beyond the Reticle: Wafer-Scale Architecture and the Future of Heterogeneous Integration
Jean-Philippe Fricker
Cerebras
contribution (in PDF)
2026 EDPS Program Committee
General Chair: Devang Jariwala @ Intel
Naresh Sehgal @ Securing the Cloud LLC.
Vivek Joshi
Brandon Wang @ Synopsys
Dwight Hill @ Hi-Key Technologies
Gang Qu @ UMD
Bharat Krishna @ Ampere Computing
Norman Chang @ Synopsys
Cindy Cui @ ChipAgents
Randy Fish @ Synopsys
Aparna Dey @ Cadence
Chris Cheng @ Hewlett-Packard Enterprise
Lucy Pan @ Intel
Ramond Rodriguez @ Intel